8-Bit CPU – FPGA & PCB | Grace O. Zongo

Overview

Designed and implemented a custom 8-bit CPU to understand processor architecture, instruction execution, and FSM-based control. Extended the design into a PCB-based implementation to explore real-world integration constraints beyond FPGA simulation.

Intel Quartus FPGA Custom instruction set ~15 kHz stable clock PCB bring-up

Phase 1: FPGA Design (Quartus)

Designed the datapath and control unit using block-diagram design in Intel Quartus.
Implemented core components: program counter, registers, RAM, ALU, and control logic.
Defined an instruction set (including addition/subtraction) and validated execution flow.
Verified functionality using simulation, testbenches, and waveform analysis.

CPU block diagram — Datapath + control unit design in Quartus

FPGA implementation of instructions and control unit

Control unit steps — Detailed steps indicating specific action of the control unit for each instruction

Phase 2: PCB Implementation

Translated the digital CPU into a PCB-level architecture, working through power and routing considerations that do not appear in FPGA simulation.

PCB-based CPU implementation: 8-bit register schematic

8-bit register PCB — 8-bit register (building block of RAM)

Printed Circuit Board — PCB for RAM, register, and 4-bit decoder testing

Results

Successfully executed all implemented instructions on FPGA hardware.
Achieved stable operation at ~15 kHz after resolving timing violations (FPGA).
Successfully demonstrated CPU operation on a custom PCB.

Waveform + testbench verification of instruction execution

What I Learned

Hands-on experience with hardware bring-up, debugging, and FPGA vs PCB design tradeoffs.
Deeper understanding of computer architecture, FSM-based control, and debugging workflow.

8-Bit CPU – FPGA (Quartus) & PCB Implementation

Overview

Phase 1: FPGA Design (Quartus)

Phase 2: PCB Implementation

Results

What I Learned